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[Software Engineeringdual.band.GMSK.transmitte

Description: This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency detector (PFD) and digital-to-analog converter (DAC) circuit element to obtain >28dB high frequency noise reduction when compared to classicalfrequency synthesis. -This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequencydetector (PFD) and digital-to-analog converter (DAC) circuit element to obtain> 28dB high frequency noise reduction when compared to classicalfrequency synthesis.
Platform: | Size: 498688 | Author: 谢振 | Hits:

[ELanguage863Lianglujiance

Description: 该程序可是多路频率检测,输出超过5赫兹为高电平,否则输出低。-But the program multi-channel frequency detector, the output of more than 5 Hz for the high, or low output.
Platform: | Size: 263168 | Author: sdcsadf | Hits:

[AI-NN-PRDesignintelligentcarriertrackingloopbasedonsoftwar

Description: 在软件接收机的基础上,利用鉴频器辅助鉴相器的输出,引入一个模糊逻辑控制器,使得环路能够智能跟踪信号的动态变化.实验结果证明所提出的设计方法与传统环路相比可大幅度缩短跟踪时间,减小环路滤波器带宽,并能消除周跳.-In the software receiver, based on the use of auxiliary frequency discriminator phase detector output, the introduction of a fuzzy logic controller, the loop can be intelligent tracking signal dynamics. The experimental results demonstrate that the proposed design method with the traditional loop phase than we might have to significantly reduce the tracking time, reduce the loop filter bandwidth, and can eliminate the cycle slips.
Platform: | Size: 344064 | Author: 何宁 | Hits:

[Software Engineering111

Description: 数字鉴相器,数字锁相环频率合成系统FPGA的实现,很有借鉴价值-Digital phase detector, digital PLL frequency synthesizer system FPGA realization of referential value
Platform: | Size: 53248 | Author: 颜小山 | Hits:

[OtherchA

Description: phase frequency detector verilog
Platform: | Size: 13312 | Author: kdlee | Hits:

[SCMHomeWork

Description: 利用89s51去寫結構化keil-C 4x4鍵盤掃描+LCD螢幕顯示 HW01:四則運算+時鍾顯示 HW02:頻率偵測器 ps.鍵盤掃描不是利用延遲作彈跳(推薦)-89s51 use to write structured keil-C, 4x4 keypad+ LCD display Scan. HW01: operator+ 4 clock display. HW02: frequency detector. Ps. Instead of using the keyboard scanning delay for the bounce (recommended)
Platform: | Size: 76800 | Author: raven | Hits:

[matlabchxu

Description: 本程序用于测量增强语音与纯净语音的对数谱距离,用于语音增强。对数谱距离越小,表明增强语音与纯净语音越接近,增强语音质量越好;反之,则增强语音质量越差。-Calculates the average log-spectral distance between CLEAN and NOISY signals. Frames are 25ms long with 60 percent (15ms) overlap, hamming windowed. RS is the remove silence option (default: 0) if 1, the program uses a Voice Activity Detector to find non-speech frames and eliminates them from calculation of LSD. FS is the sampling frequency (Default 10KHz).
Platform: | Size: 3072 | Author: 阿铁 | Hits:

[assembly languagematlabxueqi

Description: 小学期的源程序 1.试编MATLAB程序。信号 sinc(10*t),-2<=t<=2 m(t)= 0,其它 用100hz的载波来产DSB信号并解调。完成下列工作: 画出已调信号; 求已调信号的频谱,并用图像表示。 画出解调信号; 求解调信号的频谱,并用图像表示。 2.信号 sinc2(100t),|t|≤t0 m(t)= 0, 其它 采用频率调制调制为1000HZ的载波。频偏常数为kf=50,t0=0.2。 注:(求和代替积分) 3.信号 2, t0/3>t>0 m(t)= -6, t0/3<=t<2*t0/3 0, 其它 t0=0.15,使用AM调制和包络检波解调.-Primary phase of source 1. Test procedures for MATLAB. Signal sinc (10* t),-2 < = t < = 2 m (t) = 0, the other with the 100hz signal carrier to the middle class and DSB demodulation. To complete the following tasks: Draw has been transferred signal for the spectrum signals have been adjusted, and image representation. Draw demodulation signal solving transfer spectrum signal, and image representation. 2. Signal sinc2 (100t), | t | ≤ t0 m (t) = 0, the other the use of frequency modulation of the carrier modulation for 1000HZ. Offset constant kf = 50, t0 = 0.2. Note: (sum in lieu of points) 3. Signal 2, t0/3> t> 0 m (t) =-6, t0/3 < = t < 2* t0/3 0, other t0 = 0.15, the use of AM modulation and demodulation envelope detector.
Platform: | Size: 3072 | Author: 张静 | Hits:

[Internet-NetworkADF4360-7(350-1800)

Description: 介绍了ADF4360-8芯片的功能、内部结构、引脚排列及典型的应用电路及其评估板。ADF4360-8是集成的整数N合成器和压控振荡器(VCO)。芯片内嵌一个基准输入部分、N计数器和R计数器、相位频率检波器(PFD)和充电泵、多路复用器和锁定检波器、输入移位寄存器、控制锁存器、N计数锁存器、R计数锁存器。它可用于产生系统时钟,作为测试设备,用于无线局域网(LAN),作为闭路电视(CATV)设备。ADF4360-8EB1评估板可以让用户评估ADF4360-8频率合成器PLL的性能。 -Introduced the ADF4360-8-chip features, the internal structure of a typical pin and the application circuit and its evaluation board. ADF4360-8 is an integrated integer N synthesizer and voltage controlled oscillator (VCO). Input chip embedded part of a benchmark, N and R counters counter, phase frequency detector (PFD) and charge pump, and lock multiplexer detector, input shift register, control latch, N counter latch , R latch count. It can be used to generate system clock, as a test equipment for wireless local area network (LAN), as a closed-circuit television (CATV) equipment. ADF4360-8EB1 evaluation board allows users to assess the ADF4360-8 Synthesizer PLL performance.
Platform: | Size: 400384 | Author: 庄乾章 | Hits:

[OtherChargePumpPLL

Description: An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase- Frequency Detector and a current switch charge pump.-An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase-Frequency Detector and a current switch charge pump.
Platform: | Size: 129024 | Author: 刘洋 | Hits:

[Otherdianneng

Description: 使用labview7.1编写的一个简单的虚拟电能质量检测仪,监测参数包括电压偏差、频率偏差、频域谐波分析、电压波动、三相不平衡度等。-Labview7.1 prepared using a simple detector of virtual power quality, monitoring parameters, including voltage deviation, frequency deviation, frequency-domain harmonic analysis, voltage fluctuations, such as three-phase imbalance.
Platform: | Size: 61440 | Author: robyluo | Hits:

[Graph Recognize1

Description: Cognitive radio frequency spectrum detection-The spectrum sensing of a wideband frequency range is studied by dividing it into multiple subbands. It is assumed that in each subband either a primary user (PU) is active or absent in a additive white Gaussian noise environment with an unknown variance. It is also assumed that at least a minimum given number of subbands are vacant of PUs. In this multiple interrelated hypothesis testing problem, the noise variance is estimated and a generalised likelihood ratio detector is proposed to identify possible spectrum holes at a secondary user (SU). Provided that it is known that a specific PU can occupy a subset of subbands simultaneously, a grouping algorithm which allows faster spectrum sensing is proposed. The collaboration of multiple SUs can also be considered in order to enhance the detection performance. The collaborative algorithms are compared in terms of the required exchange information among SUs in some collaboration methods. The simulation results show that the propos
Platform: | Size: 231424 | Author: phillis | Hits:

[Program docDTMF_coding_with_TI

Description: This application note describes the implementation of a dual tone multiple frequency (DTMF)tone generator and detector for the TMS320C54x . This application note provides some theoretical background on the algorithms used for tone generation and detection. It documents the actual implementation in detail. Finally the code is benchmarked in terms of its speed and memory requirements.
Platform: | Size: 128000 | Author: 杨勇 | Hits:

[Windows CEDTMF_tone_generation_and_detection

Description: This application report describes the implementation of a dual-tone multiple frequency (DTMF) tone generator and detector. The author provides some theoretical background on the algorithms used for tone generation and detection, and documents the actual implementation in detail. Finally, code is benchmarked in terms of speed and memory requirements.
Platform: | Size: 174080 | Author: 杨勇 | Hits:

[Audio programmusicdsp

Description: musicdsp source code archive-Analysis Beat Detector Class Coefficients for Daubechies wavelets 1-38 DFT Envelope detector Envelope Detector class (C++) Envelope follower with different attack and release Fast in-place Walsh-Hadamard Transform FFT FFT classes in C++ and Object Pascal Frequency response from biquad coefficients Java FFT Look ahead limiting LPC analysis (autocorrelation+ Levinson-Durbin recursion) Magnitude and phase plot of arbitrary IIR function, up to 5th order Measuring interpollation noise QFT and DQFT (double precision) classes Simple peak follower tone detection with Goertzel Tone detection with Goertzel (x86 ASM) Effects 2 Wave shaping things Alien Wah Band Limited PWM Generator Bit quantization/reduction effect Class for waveguide/delay effects Compressor Decimator Delay time calculation for reverberation DIRAC- Free C/C++ Library for Time and Pitch Manipulation of Audio Based on Time-Frequency Transforms dynamic convolution Early echo s with image-mirror techn
Platform: | Size: 826368 | Author: Alan Tang | Hits:

[matlabVAD

Description: This function implements a Voice Activity Detector algorithm based on signal energy, zero crosses, frequency, and adaptative thresholds.
Platform: | Size: 1024 | Author: defghia | Hits:

[SCMPFDCP_prj

Description: 采用ADS对环路中鉴相鉴频器和电荷泵进行联合仿真,优化整体性能。-By ADS on the loop phase frequency detector and charge pump joint simulation, optimizing the overall performance.
Platform: | Size: 21504 | Author: weijianjun | Hits:

[Embeded-SCM Developsimple-signal-detector

Description: 信号检测器源码,对频率和幅度进行测量,keil4写的-Source signal detector, to measure the frequency and amplitude
Platform: | Size: 1832960 | Author: Daniel | Hits:

[Program docPhase-and-Frequency-Detector

Description: 针对锁频锁相器( Phase and Frequency Detector, PFD) 应用于低信噪比、大频偏的条件, 通过理论分析和仿真验证阐述了窗口类型对系统频偏捕获速度、范围、噪声门限及相位噪声抖动的影响机理. 推导出等效相位噪声功率谱密度的表达式. 证明了大窗口具有更低的噪声门限和更小的稳态相位抖动, 但捕获速度较慢. 为了提高捕获速度, 对鉴相器输出值取极性运算得到改进的PFD 算法. 新算法不仅能增加鉴相增益提高捕获速度 还可以减少等效噪声功率谱密度降低相位抖动 同时新算法不需要乘法器便于硬件实现. 最后新算法的性能通过仿真得到了验证.-For frequency-locking phase-locked (Phase and the Frequency Detector PFD) conditions applied to the low signal to noise ratio, frequency offset, through theoretical analysis and simulation described the capture speed of the window type, the system frequency deviation, range, noise threshold and phase noise jitter mechanism. equivalent phase noise power spectral density expression is derived to prove the large windows with a lower noise threshold and the steady-state phase jitter, but to capture slow in order to improve the capture speed, The phase detector output value to take the polarity operator improved PFD algorithm. new algorithm not only can increase the phase gain to improve the capture speed can also reduce the equivalent noise power spectral density to reduce the phase jitter new algorithm does not require a multiplier to facilitate hardware implementation performance of the last new algorithm has been verified through simulation.
Platform: | Size: 466944 | Author: jing | Hits:

[VHDL-FPGA-Verilog10-sequence-detector

Description: 本系统采用实验箱的48MHz时钟作为输入时钟,将其分频得到计数器计数频率和序列检测器检测序列频率-The system uses a 48MHz clock experimental box as the input clock, to get the counter frequency divider and serial sequence frequency detector
Platform: | Size: 41984 | Author: 陈颖 | Hits:
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